We have had a very exciting opportunity become available for a JuniorHardwareVerificationEngineer in France.
ROLE:
JuniorHardwareVerificationEngineer (H/F)
LOCATION:
Sophia Antipolis, France
DURATION:
Permanent
SALARY:
Negotiable
Position Overview:
As a JuniorHardwareVerificationEngineer, you will play a key role in verifying highly configurable IPs, ensuring quality and reliability through comprehensive testing and automation.
Key Responsibilities:
:
Define, document, develop, and execute RTL verification tests and coverage for highly parameterized IPs using Python and C++.
:
Ensure compatibility of verification tests with various RTL simulators (Cadence, Synopsys, etc.).
:
Maintain and enhance the verification workflow, focusing on improving metrics and increasing automation.
:
Develop and implement verification components such as Bus Functional Models (BFMs) and monitors used in test benches.
Your Expertise:
:
Solid understanding of hardware RTL design and verification languages:
