ARMs hardware is at the heart of the computing and connectivity revolution that continues to transform the way people live and businesses operate.
Please read the following job description thoroughly to ensure you are the right fit for this role before applying.
This position is an excellent opportunity for an expert RTL verificationengineer to join a creative, multi-disciplinary, multi-cultural team developing IP that is essential to technology platforms across the industry! This role is for the System Memory Management Unit (SMMU) team.
As part of the continued expansion of the SMMU team into new business areas such as automotive, we are looking to hire passionate RTL design and verificationengineers in the Bristol office.
If you have experience or interest in automotive IP development, this is an exciting opportunity to join a growing team! The SMMU team owns the development of next-generation Arm SMMU targeting high-end mobile, networking, and enterprise markets.
The SMMU is a key component of the Arm Architecture that provides critical and complex functionalities that complement systems design with Arm processors and Multimedia IP.
Responsibilities:
You will specify and develop new hardware verification testbenches for future generation hardware IP.
You will improve existing testbenches to increase performance, quality and efficiency.
You will also identify areas for improvement in processes and methodologies, then implement those changes to advance our best-practises and state of the art for hardware verification.
The responsibilities of a member of the Verification team are:
Reviewing and assessing proposed design changes from a verification complexity point of view Architecting verification IP and full verification environments with verification delivery ownership.
Investigating and scripting new verification flows and optimising existing ones Analysis of data from simulation runs using machine learning and data science techniques to drive efficient bug discovery and debug Developing methodology and deploying within the group and having full ownership of verification closure and mentoring other members of the team.
Close collaboration with other Arm engineering teams leading to high quality IP that works well in a complete system.
Required Skills and Experience :
You can demonstrate experience in working with constrained-random verification including ownership of a suitably complex verification environment.
Experience of architecting and implementing functional verification environments for complex IP.
Experience developing re-usable and scalable code whilst having good knowledge of SystemVerilog and UVM.
Experience in planning and writing functional coverage.
Strong scripting skills being able to develop scripting to support new flows.
Proven software engineering skills including understanding of object-oriented programming, data structures, and algorithms.
You are familiar with the tools and processes for developing testbenches and finishing all aspects of the verification process.
Strong communication skills and ability to work well as part of a team.
Dedicated with a focused approach to problem analysis and solving.
Strong experience in planning and estimation.
Team leadership and mentoring experience 'Nice To Have' Skills and Experience:
Multiprocessing microarchitecture experience including knowledge of cache coherence and bus protocols (e.g.
AMBA4 ACE or AXI) Experience in Formal Verification is a plus.
You have already worked on Functional Safety product development for the Automotive market (applying standards such as ISO 26262 and/or IEC 61508) #LI-JC1 ARM CoaleyEngland
